Beta 6: (Official in about 2 weeks)

- DMA debugger SPRxPOS/SPRxCTL and SPRxDATA/SPRxDATB was swapped.
- Lagless vsync: use raster line polling if Windows 7. D3DKMTWaitForVerticalBlankEvent() (still) seems to work badly in Windoes 7 (b5).
- PCMCIA overrode any Z2 boards at 0x600000-0x9fffff range. Any Z2 board conflict will now disable PCMCIA. (This is not really what happens in real world but you can't easily have multiple Z2 boards in A600 or A1200 either in real world. It can get confusing if you change Z2 boards and suddenly one or both boards simply stop working.)
- Added limits to internal horizontal bitplane rendering, in some situations (high AGA fetch mode, high resolution and/or subpixel mode) it overflowed to next line.
- Added support for AccessX 2000 IDE controller. Same ROM contents, different ROM address/data line "scrambling" than used in 500 variant.
- 68010 CLR.B <odd ea> caused address error. (CPU tester previous beta updates missed size check..)
- CPU tester updates, more bus error and address error special cases (branch instruction jumping to bus error address - 2 etc) checked and correctly emulated. Trace is also now much better supported.